Datasheet

Inter IC Bus

IIC Register Descriptions

MC68HC912DT128A — Rev 4.0 Technical Data

MOTOROLA Inter IC Bus 315

NOTE: If, after trying to generate a START signal and neither the IBB nor IBAL

bits are set after several cycles, the IIC should be disabled and re-

enabled with IBEN bit.

IBAL — Arbitration Lost

The arbitration lost bit (IBAL) is set by hardware when the arbitration

procedure is lost. Arbitration is lost in the following circumstances:

1. SDA sampled as low when the master drives a high during an

address or data transmit cycle.

2. SDA sampled as a low when the master drives a high during the

acknowledge bit of a data receive cycle.

3. A start cycle is attempted when the bus is busy.

4. A repeated start cycle is requested in slave mode.

5. A stop condition is detected when the master did not request it.

This bit must be cleared by software, by writing a one to it.

NOTE: If, after trying to generate a START signal and neither the IBB nor IBAL

bits are set after several cycles, the IIC should be disabled and re-

enabled with IBEN bit.

SRW — Slave Read/Write

When IAAS is set this bit indicates the value of the R/W command bit

of the calling address sent from the master.

CAUTION: This bit is only valid when the IIC is in slave mode, a complete address

transfer has occurred with an address match and no other transfers have

been initiated.

Checking this bit, the CPU can select slave transmit/receive mode

according to the command of the master.

0 = Slave receive, master writing to slave

1 = Slave transmit, master reading from slave

Frees

cale Semiconductor,

Freescale Semiconductor, Inc.

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