Datasheet

Inter IC Bus
IIC Programming Examples
MC68HC912DT128A — Rev 4.0 Technical Data
MOTOROLA Inter IC Bus 321
be done by setting the transmit acknowledge bit (TXAK) before reading
the 2nd last byte of data. Before reading the last byte of data, a STOP
signal must be generated first. The following is an example showing how
a STOP signal is generated by a master receiver.
17.7.5 Generation of Repeated START
At the end of data transfer, if the master still wants to communicate on
the bus, it can generate another START signal followed by another slave
address without first generating a STOP signal. A program example is
as shown.
17.7.6 Slave Mode
In the slave interrupt service routine, the module addressed as slave bit
(IAAS) should be tested to check if a calling of its own address has just
been received (see Figure 17-4). If IAAS is set, software should set the
transmit/receive mode select bit (Tx/Rx
bit of IBCR) according to the
R/W
command bit (SRW). Writing to the IBCR clears the IAAS
automatically. Note that the only time IAAS is read as set is from the
interrupt at the end of the address cycle where an address match
occurred, interrupts resulting from subsequent data transfers will have
IAAS cleared. A data transfer may now be initiated by writing information
to IBDR, for slave transmits, or dummy reading from IBDR, in slave
MASR DEC RXCNT ;DECREASE THE RXCNT
BEQ ENMASR ;LAST BYTE TO BE READ
MOVB RXCNT,D1 ;CHECK SECOND LAST BYTE
DEC D1 ;TO BE READ
BNE NXMAR ;NOT LAST OR SECOND LAST
LAMAR BSET IBCR,#$08 ;SECOND LAST, DISABLE ACK
;TRANSMITTING
BRA NXMAR
ENMASR BCLR IBCR,#$20 ;LAST ONE, GENERATE ‘STOP’ SIGNAL
NXMAR MOVB IBDR,RXBUF ;READ DATA AND STORE
RTI
RESTART BSET IBCR,#$04 ANOTHER START (RESTART)
MOVB CALLING,IBDR ;TRANSMIT THE CALLING ADDRESS
;D0=R/W
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