Datasheet

MSCAN Controller

Programmer’s Model of Control Registers

MC68HC912DT128A — Rev 4.0 Technical Data

MOTOROLA MSCAN Controller 365

18.13.14 msCAN12 Identifier Mask Registers (CIDMR0–7)

The identifier mask register specifies which of the corresponding bits in

the identifier acceptance register are relevant for acceptance filtering.

AM7 – AM0 — Acceptance Mask Bits

If a particular bit in this register is cleared this indicates that the

corresponding bit in the identifier acceptance register must be the

same as its identifier bit, before a match will be detected. The

message will be accepted if all such bits match. If a bit is set, it

indicates that the state of the corresponding bit in the identifier

acceptance register will not affect whether or not the message is

accepted.

0 = Match corresponding acceptance code register and identifier bits.

1 = Ignore corresponding acceptance code register bit.

NOTE: The CIDMR0–7 registers can only be written if the SFTRES bit in

CMCR0 is set.

Figure 18-16. Identifier Mask Registers (1st bank)

Bit 7654321Bit 0

CIDMR0 R