Datasheet

MC68HC912DT128A — Rev 4.0 Technical Data
MOTOROLA Appendix: Changes from MC68HC912DG128 441
Technical Data — MC68HC912DT128A
Section 22. Appendix: Changes from MC68HC912DG128
22.1 Contents
22.2 Significant changes from the MC68HC912DG128 (non-suffix
device) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .441
22.2.1 Flash. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .441
22.2.2 EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .442
22.2.3 STOP mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .443
22.2.4 WAIT mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .444
22.2.5 KWU Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .444
22.2.6 Port ADx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .444
22.2.7 ATD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .444
22.2 Significant changes from the MC68HC912DG128 (non-suffix device)
22.2.1 Flash
22.2.1.1 Flash Architecture
The flash arrays are made from a new non-volatile memory (NVM)
technology. An external VFP is no longer used. Programming is now
carried out on a whole row (64 bytes) at a time. Erasing is still a bulk
erase of the entire array.
22.2.1.2 Flash Control Register
The Flash Control Register (FEECTL) is in the same location. However,
the individual bit functions have changed significantly to support the new
technology.
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cale Semiconductor,
I
Freescale Semiconductor, Inc.
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