Datasheet

MC68HC912DT128A — Rev 4.0 Technical Data
MOTOROLA List of Tables 21
Technical Data — MC68HC912DT128A
List of Tables
Table Title Page
1-1 Device Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . .32
1-2 Development Tools Ordering Information. . . . . . . . . . . . . . . . .33
2-1 M68HC12 Addressing Mode Summary . . . . . . . . . . . . . . . . . .38
2-2 Summary of Indexed Operations . . . . . . . . . . . . . . . . . . . . . . .39
3-1 MC68HC912DT128A Power and Ground Connection
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
3-2 MC68HC912DT128A Signal Description Summary . . . . . . . . .54
3-3 MC68HC912DT128A Port Description Summary. . . . . . . . . . .64
3-4 Port Pull-Up, Pull-Down and Reduced Drive Summary . . . . . .65
4-1 Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68
5-1 Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80
6-1 Mapping Precedence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88
6-2 Program space Page Index . . . . . . . . . . . . . . . . . . . . . . . . . . .93
6-3 Flash Register space Page Index. . . . . . . . . . . . . . . . . . . . . . .93
6-4 Test mode program space Page Index. . . . . . . . . . . . . . . . . . .94
6-5 RFSTR Stretch Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . .97
6-6 EXSTR Stretch Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . .98
7-1 Access Type vs. Bus Control Pins . . . . . . . . . . . . . . . . . . . . .104
9-1 EEDIV Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
9-2 2K byte EEPROM Block Protection . . . . . . . . . . . . . . . . . . . .130
9-3 Erase Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131
9-4 Shadow word mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134
10-1 Interrupt Vector Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .140
10-2 Stacking Order on Entry to Interrupts . . . . . . . . . . . . . . . . . . .147
12-1 Summary of STOP Mode Exit Conditions. . . . . . . . . . . . . . . .174
12-2 Summary of Pseudo STOP Mode Exit Conditions . . . . . . . . .174
12-3 Clock Monitor Time-Outs . . . . . . . . . . . . . . . . . . . . . . . . . . . .186
12-4 Real Time Interrupt Rates. . . . . . . . . . . . . . . . . . . . . . . . . . . .188
12-5 COP Watchdog Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .191
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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