Datasheet

Pulse Width Modulator
Technical Data MC68HC912DT128A — Rev 4.0
234 Pulse Width Modulator MOTOROLA
Read and write anytime. A write will cause the scaler counter PWSCNT1
to load the PWSCAL1 value unless in special mode with DISCAL = 1 in
the PWTST register.
PWM channels 2 and 3 can select clock S1 (scaled) as its input clock by
setting the control bit PCLK2 and PCLK3 respectively. Clock S1 is
generated by dividing clock B by the value in the PWSCAL1 register + 1
and dividing again by two. When PWSCAL1 = $FF, clock B is divided by
256 then divided by two to generate clock S1.
PWSCNT1 is a down-counter that, upon reaching $00, loads the value
of PWSCAL1. Read any time.
Read and write anytime. A write will cause the PWM counter to reset to
$00.
In special mode, if DISCR = 1, a write does not reset the PWM counter.
PWSCAL1 — PWM Scale Register 1 $0046
Bit 7 6 5 4 3 2 1 Bit 0
Bit 7 6 5 4 3 2 1 Bit 0
RESET: 0 0 0 0 0 0 0 0
PWSCNT1 — PWM Scale Counter 1 Value $0047
Bit 7 6 5 4 3 2 1 Bit 0
Bit 7 6 5 4 3 2 1 Bit 0
RESET: 0 0 0 0 0 0 0 0
PWCNTx — PWM Channel Counters
Bit 7 6 5 4 3 2 1 Bit 0
PWCNT0 Bit 7 6 5 4 3 2 1 Bit 0 $0048
PWCNT1 Bit 7 6 5 4 3 2 1 Bit 0 $0049
PWCNT2 Bit 7 6 5 4 3 2 1 Bit 0 $004A
PWCNT3 Bit 7 6 5 4 3 2 1 Bit 0 $004B
RESET: 0 0 0 0 0 0 0 0
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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