Datasheet

Multiple Serial Interface
Technical Data MC68HC912DT128A — Rev 4.0
288 Multiple Serial Interface MOTOROLA
PF — Parity Error Flag
Indicates if received data’s parity matches parity bit. This feature is
active only when parity is enabled. The type of parity tested for is
determined by the PT (parity type) bit in SCxCR1.
0 = Parity correct
1 = Incorrect parity detected
Read anytime. Write has no meaning or effect.
RAF — Receiver Active Flag
This bit is controlled by the receiver front end. It is set during the RT1
time period of the start bit search. It is cleared when an idle state is
detected or when the receiver circuitry detects a false start bit
(generally due to noise or baud rate mismatch).
0 = A character is not being received
1 = A character is being received
If enabled with RIE = 1, RAF set generates an interrupt when
VDDPLL is high while in WAIT mode.
SC0SR2/SC1SR2 — SCI Status Register 2 $00C5/$00CD
Bit 7654321Bit 0
0000000RAF
RESET: 00000000
SC0DRH/SC1DRH — SCI Data Register High $00C6/$00CE
Bit 7654321Bit 0
R8T8000000
RESET: — — — — — — — —
SC0DRL/SC1DRL — SCI Data Register Low $00C7/$00CF
Bit 7654321Bit 0
R7/T7 R6/T6 R5/T5 R4/T4 R3/T3 R2/T2 R1/T1 R0/T0
RESET: ————————
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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