Datasheet

Timer/PWM Module (S08TPMV3)
MC9S08AC16 Series Data Sheet, Rev. 9
188 Freescale Semiconductor
Figure 10-18. Generation of low-true EPWM signal by TPM v2 and v3 after the reset
The following procedure can be used in TPM v3 (when the channel pin is also a port pin) to emulate
the high-true EPWM generated by TPM v2 after the reset.
...
configure the channel pin as output port pin and set the output pin;
configure the channel to generate the EPWM signal but keep ELSnB:ELSnA as 00;
configure the other registers (TPMxMODH, TPMxMODL, TPMxCnVH, TPMxCnVL, ...);
configure CLKSB:CLKSA bits (TPM v3 starts to generate the high-true EPWM signal, however
TPM does not control the channel pin, so the EPWM signal is not available);
wait until the TOF is set (or use the TOF interrupt);
enable the channel output by configuring ELSnB:ELSnA bits (now EPWM signal is available);
...
ELSnB:ELSnA BITS
CLKSB:CLKSA BITS
0
TPMxMODH:TPMxMODL = 0x0007
TPMxCnVH:TPMxCnVL = 0x0005
TPMxCNTH:TPMxCNTL
TPMv2 TPMxCHn
EPWM mode
00
00 01
BUS CLOCK
01
1234567 01 2
CHnF BIT
MSnB:MSnA BITS
00 10
(in TPMv2 and TPMv3)
TPMv3 TPMxCHn
...
RESET (active low)