Datasheet

Appendix A Electrical Characteristics and Timing Specifications
MC9S08AC16 Series Data Sheet, Rev. 9
312 Freescale Semiconductor
Figure A-11. Active Background Debug Mode Latch Timing
Figure A-12. IRQ/KBIPx Timing
A.10.2 Timer/PWM (TPM) Module Timing
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that
can be used as the optional external source to the timer counter. These synchronizers operate from the
current bus rate clock.
Table A-13. TPM Input Timing
Function Symbol Min Max Unit
External clock frequency
f
TPMext
dc
f
Bus
/4
MHz
External clock period
t
TPMext
4—
t
cyc
External clock high time
t
clkh
1.5 —
t
cyc
External clock low time
t
clkl
1.5 —
t
cyc
Input capture pulse width
t
ICPW
1.5 —
t
cyc
BKGD/MS
RESET
t
MSSU
t
MSH
t
IHIL
IRQ/KBIP6–KBIP4
t
ILIH
IRQ/KBIPx