Datasheet

Chapter 6 Parallel Input/Output
MC9S08AC16 Series Data Sheet, Rev. 9
Freescale Semiconductor 95
6.7.6 Port C Pin Control Registers (PTCPE, PTCSE, PTCDS)
In addition to the I/O control, port C pins are controlled by the registers listed below.
76543210
R0
R PTCDD5 PTCDD4 PTCDD3 PTCDD2 PTCDD1 PTCDD0
W
Reset00000000
Figure 6-21. Data Direction for Port C (PTCDD)
1
1
Bit 6 is a reserved bit that must always be written to 0.
Table 6-12. PTCDD Register Field Descriptions
Field Description
5:0
PTCDD[5:0]
Data Direction for Port C Bits — These read/write bits control the direction of port C pins and what is read for
PTCD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port C bit n and PTCD reads return the contents of PTCDn.
76543210
R0
R PTCPE5 PTCPE4 PTCPE3 PTCPE2 PTCPE1 PTCPE0
W
Reset00000000
Figure 6-22. Internal Pullup Enable for Port C (PTCPE)
1
1
Bit 6 is a reserved bit that must always be written to 0.
Table 6-13. PTCPE Register Field Descriptions
Field Description
5:0
PTCPE[5:0]
Internal Pullup Enable for Port C Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTC pin. For port C pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port C bit n.
1 Internal pullup device enabled for port C bit n.