Datasheet

Chapter 6 Parallel Input/Output
MC9S08AC16 Series Data Sheet, Rev. 9
96 Freescale Semiconductor
76543210
R0
R PTCSE5 PTCSE4 PTCSE3 PTCSE2 PTCSE1 PTCSE0
W
Reset00000000
Figure 6-23. Output Slew Rate Control Enable for Port C (PTCSE)
1
1
Bit 6 is a reserved bit that must always be written to 0.
Table 6-14. PTCSE Register Field Descriptions
Field Description
5:0
PTCSE[5:0]
Output Slew Rate Control Enable for Port C Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTC pin. For port C pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port C bit n.
1 Output slew rate control enabled for port C bit n.
76543210
R0
R PTCDS5 PTCDS4 PTCDS3 PTCDS2 PTCDS1 PTCDS0
W
Reset00000000
Figure 6-24. Output Drive Strength Selection for Port C (PTCDS)
1
1
Bit 6 is a reserved bit that must always be written to 0.
Table 6-15. PTCDS Register Field Descriptions
Field Description
5:0
PTCDS[5:0]
Output Drive Strength Selection for Port C Bits — Each of these control bits selects between low and high
output drive for the associated PTC pin.
0 Low output drive enabled for port C bit n.
1 High output drive enabled for port C bit n.