Datasheet

MC9S08AW60 Data Sheet, Rev 2
Freescale Semiconductor 129
Chapter 8
Internal Clock Generator (S08ICGV4)
The internal clock generation (ICG) module is used to generate the system clocks for the MC9S08AW60
Series MCU. The analog supply lines V
DDA
and V
SSA
are internally derived from the MCU’s V
DD
and
V
SS
pins. Electrical parametric data for the ICG may be found in Appendix A, “Electrical Characteristics
and Timing Specifications.”
Figure 8-1. System Clock Distribution Diagram
NOTE
Freescale Semiconductor recommends that FLASH location $FFBE be
reserved to store a nonvolatile version of ICGTRM. This will allow
debugger and programmer vendors to perform a manual trim operation and
store the resultant ICGTRM value for users to access at a later time.
TPM1 TPM2 IIC1 SCI1 SCI2 SPI1
BDC
CPU
ADC
RAM FLASH
ICG
ICGOUT
÷2
FFE
SYSTEM
LOGIC
BUSCLK
ICGLCLK*
CONTROL
FIXED FREQ CLOCK (XCLK)
ICGERCLK
RTI
* ICGLCLK is the alternate BDC clock source for the MC9S08AW60 Series.
÷2
FLASH has frequency
requirements for program
and erase operation.
See Appendix A, “Electrical
Characteristics and Timing
Specifications.
ADC has min and max
frequency requirements.
See Chapter 14,
“Analog-to-Digital Converter
(S08ADC10V1) and
Appendix A, “Electrical
Characteristics and Timing
Specifications