Datasheet

Chapter 8 Internal Clock Generator (S08ICGV4)
MC9S08AW60 Data Sheet, Rev 2
148 Freescale Semiconductor
The following sections contain initialization examples for various configurations.
NOTE
Hexadecimal values designated by a preceding $, binary values designated
by a preceding %, and decimal values have no preceding character.
Important configuration information is repeated here for reference.
Table 8-10. ICG Configuration Consideration
Clock Reference Source = Internal Clock Reference Source = External
FLL
Engaged
FEI
4 MHz < f
Bus
< 20 MHz.
Medium power (will be less than FEE if oscillator
range = high)
Good clock accuracy (After IRG is trimmed)
Lowest system cost (no external components
required)
IRG is on. DCO is on.
1
1
The IRG typically consumes 100 μA. The FLL and DCO typically consumes 0.5 to 2.5 mA, depending upon output frequency.
For minimum power consumption and minimum jitter, choose N and R to be as small as possible.
FEE
4 MHz < f
Bus
< 20 MHz
Medium power (will be less than FEI if oscillator
range = low)
High clock accuracy
Medium/High system cost (crystal, resonator or
external clock source required)
IRG is off. DCO is on.
FLL
Bypassed
SCM
This mode is mainly provided for quick and reliable
system startup.
3 MHz < f
Bus
< 5 MHz (default).
3 MHz < f
Bus
< 20 MHz (via filter bits).
Medium power
Poor accuracy.
IRG is off. DCO is on and open loop.
FBE
f
Bus
range ≤ 8 MHz when crystal or resonator is
used.
Lowest power
Highest clock accuracy
Medium/High system cost (Crystal, resonator or
external clock source required)
IRG is off. DCO is off.
Table 8-11. ICGOUT Frequency Calculation Options
Clock Scheme f
ICGOUT
1
1
Ensure that f
ICGDCLK
, which is equal to f
ICGOUT
* R, does not exceed f
ICGDCLKmax
.
P Note
SCM — self-clocked mode (FLL bypassed
internal)
f
ICGDCLK
/ R NA Typical f
ICGOUT
= 8 MHz
immediately after reset
FBE — FLL bypassed external f
ext
/ R NA
FEI — FLL engaged internal (f
IRG
/ 7)* 64 * N / R 64 Typical f
IRG
= 243 kHz
FEE — FLL engaged external f
ext
* P * N / R Range = 0 ; P = 64
Range = 1; P = 1
Table 8-12. MFD and RFD Decode Table
MFD Value Multiplication Factor (N) RFD Division Factor (R)
000 4 000 ÷1
001 6 001 ÷2
010 8 010 ÷4
011 10 011 ÷8
100 12 100 ÷16