Datasheet

Chapter 13 Inter-Integrated Circuit (S08IICV1)
MC9S08AW60 Data Sheet, Rev 2
218 Freescale Semiconductor
13.1.3 Block Diagram
Figure 13-2 is a block diagram of the IIC.
Figure 13-2. IIC Functional Block Diagram
13.2 External Signal Description
This section describes each user-accessible pin signal.
13.2.1 SCL — Serial Clock Line
The bidirectional SCL is the serial clock line of the IIC system.
13.2.2 SDA — Serial Data Line
The bidirectional SDA is the serial data line of the IIC system.
13.3 Register Definition
This section consists of the IIC register descriptions in address order.
INPUT
SYNC
IN/OUT
DATA
SHIFT
REGISTER
ADDRESS
COMPARE
INTERRUPT
CLOCK
CONTROL
START
STOP
ARBITRATION
CONTROL
CTRL_REG FREQ_REG ADDR_REG STATUS_REG DATA_REG
ADDR_DECODE DATA_MUX
DATA BUS
SCL
SDA
ADDRESS