Datasheet

Chapter 3 Modes of Operation
MC9S08AW60 Data Sheet, Rev 2
38 Freescale Semiconductor
KBI Off Optionally On
3
RTI Optionally On
4
Optionally On
4
SCI Off Standby
SPI Off Standby
TPM Off Standby
Voltage Regulator Standby Standby
I/O Pins States Held States Held
1
Requires the asynchronous ADC clock and LVD to be enabled, else in
standby.
2
OSCSTEN set in ICSC1, else in standby. For high frequency range (RANGE
in ICSC2 set) requires the LVD to also be enabled in stop3.
3
During stop3, KBI pins that are enabled continue to function as interrupt
sources that are capable of waking the MCU from stop3.
4
This RTI can be enabled to run in stop2 or stop3 with the internal RTI clock
source (RTICLKS = 0, in SRTISC). The RTI also can be enabled to run in
stop3 with the external clock source (RTICLKS = 1 and OSCSTEN = 1).
Table 3-4. Stop Mode Behavior (continued)
Peripheral
Mode
Stop2 Stop3