Datasheet

Chapter 6 Parallel Input/Output
MC9S08AW60 Data Sheet, Rev 2
90 Freescale Semiconductor
76543210
R
PTASE7 PTASE6 PTASE5 PTASE4 PTASE3 PTASE2 PTASE1 PTASE0
W
Reset 00000000
Figure 6-12. Output Slew Rate Control Enable for Port A (PTASE)
Table 6-5. PTASE Register Field Descriptions
Field Description
7:0
PTASE[7:0]
Output Slew Rate Control Enable for Port A Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTA pin. For port A pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port A bit n.
1 Output slew rate control enabled for port A bit n.
76543210
R
PTADS7 PTADS6 PTADS5 PTADS4 PTADS3 PTADS2 PTADS1 PTADS0
W
Reset 00000000
Figure 6-13. Output Drive Strength Selection for Port A (PTASE)
Table 6-6. PTASE Register Field Descriptions
Field Description
7:0
PTADS[7:0]
Output Drive Strength Selection for Port A Bits — Each of these control bits selects between low and high
output drive for the associated PTA pin.
0 Low output drive enabled for port A bit n.
1 High output drive enabled for port A bit n.