Datasheet

Chapter 6 Parallel Input/Output Control
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor 133
6.5.9.3 Port J Pull Enable Register (PTJPE)
NOTE
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured.
6.5.9.4 Port J Slew Rate Enable Register (PTJSE)
Note: Slew rate reset default values may differ between engineering samples and final production parts. Always initialize slew
rate control to the desired value to ensure correct operation.
76543210
R
PTJPE7 PTJPE6 PTJPE5 PTJPE4 PTJPE3 PTJPE2 PTJPE1 PTJPE0
W
Reset: 00000000
Figure 6-54. Internal Pull Enable for Port J Register (PTJPE)
Table 6-52. PTJPE Register Field Descriptions
Field Description
7:0
PTJPE[7:0]
Internal Pull Enable for Port J Bits — Each of these control bits determines if the internal pull-up device is
enabled for the associated PTJ pin. For port J pins that are configured as outputs, these bits have no effect and
the internal pull devices are disabled.
0 Internal pull-up device disabled for port J bit n.
1 Internal pull-up device enabled for port J bit n.
76543210
R
PTJSE7 PTJSE6 PTJSE5 PTJSE4 PTJSE3 PTJSE2 PTJSE1 PTJSE0
W
Reset: 00000000
Figure 6-55. Slew Rate Enable for Port J Register (PTJSE)
Table 6-53. PTJSE Register Field Descriptions
Field Description
7:0
PTJSE[7:0]
Output Slew Rate Enable for Port J Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTJ pin. For port J pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port J bit n.
1 Output slew rate control enabled for port J bit n.