Datasheet

Chapter 6 Parallel Input/Output Control
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor 135
6.5.9.7 Port J Interrupt Pin Select Register (PTJPS)
6.5.9.8 Port J Interrupt Edge Select Register (PTJES)
76543210
R
PTJPS7 PTJPS6 PTJPS5 PTJPS4 PTJPS3 PTJPS2 PTJPS1 PTJPS0
W
Reset: 00000000
Figure 6-58. Port J Interrupt Pin Select Register (PTJPS)
Table 6-56. PTJPS Register Field Descriptions
Field Description
7:0
PTJPS[7:0]
Port J Interrupt Pin Selects — Each of the PTJPSn bits enable the corresponding port J interrupt pin.
0 Pin not enabled as interrupt.
1 Pin enabled as interrupt.
76543210
R
PTJES7 PTJES6 PTJES5 PTJES4 PTJES3 PTJES2 PTJES1 PTJES0
W
Reset: 00000000
Figure 6-59. Port J Edge Select Register (PTJES)
Table 6-57. PTJES Register Field Descriptions
Field Description
7:0
PTJES[7:0]
Port J Edge Selects — Each of the PTJESn bits serves a dual purpose by selecting the polarity of the active
interrupt edge as well as selecting a pull-up or pull-down device if enabled.
0 A pull-up device is connected to the associated pin and detects falling edge/low level for interrupt generation.
1 A pull-down device is connected to the associated pin and detects rising edge/high level for interrupt
generation.