Datasheet

Chapter 8 Multi-Purpose Clock Generator (S08MCGV2)
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor 171
Table 8-2. FLL External Reference Divide Factor
RDIV
Divide Factor
RANGE:DIV32
0:X
RANGE:DIV32
1:0
RANGE:DIV32
1:1
0 1132
1 2264
2 4 4 128
3 8 8 256
4 16 16 512
5 32 32 1024
6 64 64 Reserved
7 128 128 Reserved
Table 8-3. PLL External Reference Divide Factor
RDIV Divide Factor
0 1
1 2
2 4
3 8
4 16
5 32
6 64
7 128