Datasheet

Chapter 17 Development Support
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor 391
Figure 17-6. System Background Debug Force Reset Register (SBDFR)
76543210
R00000000
W BDFR
1
1
BDFR is writable only through serial background mode debug commands, not from user programs.
Reset 00000000
= Unimplemented or Reserved
Table 17-3. SBDFR Register Field Description
Field Description
0
BDFR
Background Debug Force Reset — A serial active background mode command such as WRITE_BYTE allows
an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot
be written from a user program.