Datasheet

Chapter 18 Debug Module (S08DBGV3) (128K)
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor 417
• DBGCAX=0x00, DBGCAH=0xFF, DBGCAL=0xFE so comparator A is set to match when the
16-bit CPU address 0xFFFE appears during the reset vector fetch
• DBGC=0xC0 to enable and arm the DBG module
• DBGT=0x40 to select a force-type trigger, a BEGIN trigger, and A-only trigger mode
18.6 Interrupts
The DBG contains no interrupt source.
18.7 Electrical Specifications
The DBG module contain no electrical specifications.