Datasheet

Chapter 4 Memory
MC9S08DZ128 Series Data Sheet, Rev. 1
64 Freescale Semiconductor
4.4.3.3 Linear Word Post Increment Register (LWP)
This register is one of three data registers that the user can use to access any FLASH memory location in
the extended address map. When LWP is accessed the contents of LAP2:LAP0 make up the extended
address of the FLASH memory location to be addressed. When accessing data using LWP, the contents of
LAP2:LAP0 will increment after the read or write is complete.
Accessing LWP does the same thing as accessing LBP. The MMU register ordering of LWP followed by
LBP, allow the user to access data by words using the LDHX or STHX instructions of the LWP register.
4.4.3.4 Linear Byte Post Increment Register (LBP)
This register is one of three data registers that the user can use to access any FLASH memory location in
the extended address map. When LBP is accessed the contents of LAP2:LAP0 make up the extended
76543210
R0000000
LA16
W
R
LA15 LA14 LA13 LA12 LA11 LA10 LA9 LA8
W
R
LA7 LA6 LA5 LA4 LA3 LA2 LA1 LA0
W
Reset: 0 0 0 0 0 0 0 0
Figure 4-6. Linear Address Pointer Registers 2:0 (LAP2:LAP0)
Table 4-7. Linear Address Pointer Registers 2:0 Field Descriptions
Field Description
16:0
LA16:LA0
The values in LAP2:LAP0 are used to create a 17-bit linear address pointer. The value in these registers are used
as the extended address when accessing any of the data registers LB, LBP and LWP.
76543210
R
D7 D6 D5 D4 D3 D2 D1 D0
W
Reset: 0 0 0 0 0 0 0 0
Figure 4-7. Linear Word Post Increment Register (LWP)
Table 4-8. Linear Word Post Increment Register Field Descriptions
Field Description
7:0
D7:D0
Reads of this register will first return the data value pointed to by the linear address pointer, LAP2:LAP0 and then
will increment LAP2:LAP0. Writes to this register will first write the data value to the memory location specified
by the linear address pointer and then will increment LAP2:LAP0. Writes to this register are most commonly used
when writing to the FLASH block(s) during programming.