Datasheet

Chapter 4 Memory
MC9S08DZ128 Series Data Sheet, Rev. 1
78 Freescale Semiconductor
if PRDIV8 = 0 — f
FCLK
= f
Bus
÷ (DIV + 1) Eqn. 4-1
if PRDIV8 = 1 — f
FCLK
= f
Bus
÷ (8 × (DIV + 1)) Eqn. 4-2
Table 4-14 shows the appropriate values for PRDIV8 and DIV for selected bus frequencies.
4.6.11.2 FLASH and EEPROM Options Register (FOPT and NVOPT)
During reset, the contents of the nonvolatile location NVOPT are copied from FLASH into FOPT. To
change the value in this register, erase and reprogram the NVOPT location in FLASH memory as usual
and then issue a new MCU reset.
Table 4-14. FLASH and EEPROM Clock Divider Settings
f
Bus
PRDIV8
(Binary)
DIV
(Decimal)
f
FCLK
Program/Erase Timing Pulse
(5 μs Min, 6.7 μs Max)
20 MHz 1 12 192.3 kHz 5.2 μs
10 MHz 0 49 200 kHz 5 μs
8 MHz 0 39 200 kHz 5 μs
4 MHz 0 19 200 kHz 5 μs
2 MHz 0 9 200 kHz 5 μs
1 MHz 0 4 200 kHz 5 μs
200 kHz 0 0 200 kHz 5 μs
150 kHz 0 0 150 kHz 6.7 μs
76543210
R KEYEN FNORED EPGMOD 0 0 0 SEC
W
Reset F F F 0 0 0 F F
= Unimplemented or Reserved
Figure 4-15. FLASH and EEPROM Options Register (FOPT)
Table 4-15. FOPT Register Field Descriptions
Field Description
7
KEYEN
Backdoor Key Mechanism Enable — When this bit is 0, the backdoor key mechanism cannot be used to
disengage security. The backdoor key mechanism is accessible only from user (secured) firmware. BDM
commands cannot be used to write key comparison values that would unlock the backdoor key. For more detailed
information about the backdoor key mechanism, refer to Section 4.6.9, “Security.”
0 No backdoor key access allowed.
1 If user firmware writes an 8-byte value that matches the nonvolatile backdoor key (NVBACKKEY through
NVBACKKEY+7 in that order), security is temporarily disengaged until the next MCU reset.
6
FNORED
Vector Redirection Disable — When this bit is 1, vector redirection is disabled.
0 Vector redirection enabled.
1 Vector redirection disabled.