Datasheet

Chapter 4 Memory
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor 79
4.6.11.3 FLASH and EEPROM Configuration Register (FCNFG)
5
EPGMOD
EEPROM Sector Mode — When this bit is 0, each sector is split into two pages (4-byte mode). When this bit is
1, each sector is in a single page (8-byte mode).
0 Half of each EEPROM sector is in Page 0 and the other half is in Page 1.
1 Each sector is in a single page.
1:0
SEC
Security State Code — This 2-bit field determines the security state of the MCU as shown in Table 4-16. When
the MCU is secure, the contents of RAM, EEPROM and FLASH memory cannot be accessed by instructions
from any unsecured source including the background debug interface. SEC changes to 1:0 after successful
backdoor key entry or a successful blank check of FLASH. For more detailed information about security, refer to
Section 4.6.9, “Security.”
Table 4-16. Security States
1
1
SEC changes to 1:0 after successful backdoor key entry
or a successful blank check of FLASH.
SEC[1:0] Description
0:0 secure
0:1 secure
1:0 unsecured
1:1 secure
76543210
R0
EPGSEL KEYACC
10001
W
Reset 00010001
= Unimplemented or Reserved
Figure 4-16. FLASH and EEPROM Configuration Register (FCNFG)
Table 4-17. FCNFG Register Field Descriptions
Field Description
6
EPGSEL
EEPROM Page Select — This bit selects which EEPROM page is accessed in the memory map.
0 Page 0 is in foreground of memory map. Page 1 is in background and can not be accessed.
1 Page 1 is in foreground of memory map. Page 0 is in background and can not be accessed.
5
KEYACC
Enable Writing of Access Key — This bit enables writing of the backdoor comparison key. For more detailed
information about the backdoor key mechanism, refer to Section 4.6.9, “Security.”
0 Writes to 0xFFB0–0xFFB7 are interpreted as the start of a FLASH programming or erase command.
1 Writes to NVBACKKEY (0xFFB0–0xFFB7) are interpreted as comparison key writes.
Table 4-15. FOPT Register Field Descriptions
Field Description