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ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 64 (10x10) 8-Bit 40 MHz I/O number 56

Chapter 6 Parallel Input/Output

MC9S08GB60A Data Sheet, Rev. 2

Freescale Semiconductor 83

6.2 Features

Parallel I/O features, depending on package choice, include:

• A total of 56 general-purpose I/O pins in seven ports (PTG0 is output only)

• High-current drivers on port C and port F pins

• Hysteresis input buffers

• Software-controlled pullups on each input pin

• Software-controlled slew rate output buffers

• Eight port A pins shared with KBI1

• Eight port B pins shared with ATD1

• Eight high-current port C pins shared with SCI2 and IIC1

• Eight port D pins shared with TPM1 and TPM2

• Eight port E pins shared with SCI1 and SPI1

• Eight high-current port F pins

• Eight port G pins shared with EXTAL, XTAL, and BKGD/MS

6.3 Pin Descriptions

The MC9S08GBxxA/GTxxA has a total of 56 parallel I/O pins (one is output only) in seven 8-bit ports

(PTA–PTG). Not all pins are bonded out in all packages. Consult the pin assignment in Chapter 2, “Pins

and Connections,” for available parallel I/O pins. All of these pins are available for general-purpose I/O

when they are not used by other on-chip peripheral systems.

After reset, BKGD/MS is enabled and therefore is not usable as an output pin until BKGDPE in SOPT is

cleared. The rest of the peripheral functions are disabled. After reset, all data direction and pullup enable

controls are set to 0s. These pins default to being high-impedance inputs with on-chip pullup devices

disabled.

The following paragraphs discuss each port and the software controls that determine each pin’s use.

6.3.1 Port A and Keyboard Interrupts

Figure 6-2. Port A Pin Names

Port A is an 8-bit port shared among the KBI keyboard interrupt inputs and general-purpose I/O. Any pins

enabled as KBI inputs will be forced to act as inputs.

Port A pins are available as general-purpose I/O pins controlled by the port A data (PTAD), data direction

(PTADD), pullup enable (PTAPE), and slew rate control (PTASE) registers. Refer to Section 6.4, “Parallel

I/O Controls,” for more information about general-purpose I/O control.

Port A Bit 7654321Bit 0

MCU Pin:

PTA7/

KBI1P7

PTA6/

KBI1P6

PTA5/

KBI1P5

PTA4/

KBI1P4

PTA3/

KBI1P3

PTA2/

KBI1P2

PTA1/

KBI1P1

PTA0/

KBI1P0