Datasheet

Chapter 6 Parallel Input/Output
MC9S08GB60A Data Sheet, Rev. 2
98 Freescale Semiconductor
76543210
R
PTEPE7 PTEPE6 PTEPE5 PTEPE4 PTEPE3 PTEPE2 PTEPE1 PTEPE0
W
Reset00000000
Figure 6-26. Pullup Enable for Port E (PTEPE)
Table 6-18. PTEPE Field Descriptions
Field Description
7:0
PTEPE[7:0]
Pullup Enable for Port E Bits — For port E pins that are inputs, these read/write control bits determine whether
internal pullup devices are enabled. For port E pins that are configured as outputs, these bits are ignored and the
internal pullup devices are disabled.
0 Internal pullup device disabled.
1 Internal pullup device enabled.
76543210
R
PTESE7 PTESE6 PTESE5 PTESE4 PTESE3 PTESE2 PTESE1 PTESE0
W
Reset00000000
Figure 6-27. Slew Rate Control Enable for Port E (PTESE)
Table 6-19. PTESE Field Descriptions
Field Description
7:0
PTESE[7:0]
Slew Rate Control Enable for Port E Bits — For port E pins that are outputs, these read/write control bits
determine whether the slew rate controlled outputs are enabled. For port E pins that are configured as inputs,
these bits are ignored.
0 Slew rate control disabled.
1 Slew rate control enabled.
76543210
R
PTEDD7 PTEDD6 PTEDD5 PTEDD4 PTEDD3 PTEDD2 PTEDD1 PTEDD0
W
Reset00000000
Figure 6-28. Data Direction for Port E (PTEDD)
Table 6-20. PTEDD Field Descriptions
Field Description
7:0
PTEDD[7:0]
Data Direction for Port E Bits — These read/write bits control the direction of port E pins and what is read for
PTED reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port E bit n and PTED reads return the contents of PTEDn.