Datasheet

Chapter 6 Parallel Input/Output
MC9S08GB60A Data Sheet, Rev. 2
92 Freescale Semiconductor
76543210
R
PTBSE7 PTBSE6 PTBSE5 PTBSE4 PTBSE3 PTBSE2 PTBSE1 PTBSE0
W
Reset00000000
Figure 6-15. Data Direction for Port A (PTBSE)
Table 6-7. PTBSE Field Descriptions
Field Description
7:0
PTBSE[7:0]
Slew Rate Control Enable for Port B Bits — For port B pins that are outputs, these read/write control bits
determine whether the slew rate controlled outputs are enabled. For port B pins that are configured as inputs,
these bits are ignored.
0 Slew rate control disabled.
1 Slew rate control enabled.
76543210
R
PTBDD7 PTBDD6 PTBDD5 PTBDD4 PTBDD3 PTBDD2 PTBDD1 PTBDD0
W
Reset00000000
Figure 6-16. Data Direction for Port B (PTBDD)
Table 6-8. PTBDD Field Descriptions
Field Description
7:0
PTBDD[7:0]
Data Direction for Port B Bits — These read/write bits control the direction of port B pins and what is read for
PTBD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port B bit n and PTBD reads return the contents of PTBDn.