Datasheet

Pins and Connections
MC9S08GT16A/GT8A Data Sheet, Rev. 1
32 Freescale Semiconductor
PTB3/ADP3 I/O N SWC SWC
PTB4/ADP4 I/O N SWC SWC Not available on 32-pin pkg
PTB5/ADP5 I/O N SWC SWC Not available on 32-pin pkg
PTB6/ADP6 I/O N SWC SWC Not available on 32-pin pkg
PTB7/ADP7 I/O N SWC SWC Not available on 32-pin pkg
PTC0/TxD2 I/O Y SWC SWC
When pin is configured for SCI function, pin
is configured for partial output drive.
PTC1/RxD2 I/O Y SWC SWC
PTC2/SDA I/O Y SWC SWC
PTC3/SCL I/O Y SWC SWC
PTC4 I/O Y SWC SWC Not available on 32-pin pkg
PTC5 I/O Y SWC SWC Not available on 32-pin or 42-pin pkg
PTC6 I/O Y SWC SWC Not available on 32-pin or 42-pin pkg
PTC7 I/O Y SWC SWC Not available on 32-pin, 42- or 44-pin pkg
PTD0/TPM1CLK/TPM1CH0 I/O N SWC SWC
PTD1/TPM1CH1 I/O N SWC SWC
PTD2/TPM1CH2 I/O N SWC SWC Not available on 32-pin, 42- or 44-pin pkg
PTD3/TPM2CLK/TPM2CH0 I/O N SWC SWC
PTD4/TPM2CH1 I/O N SWC SWC Not available on 32-pin pkg
PTE0/TxD1 I/O N SWC SWC
PTE1/RxD1 I/O N SWC SWC
PTE2/
SS
I/O N SWC SWC
PTE3/MISO I/O N SWC SWC
PTE4/MOSI I/O N SWC SWC
PTE5/SPSCK I/O N SWC SWC
PTG0/BKGD/MS O N SWC SWC
Pullup enabled and slew rate disabled when
BDM function enabled.
PTG1/XTAL I/O N SWC SWC
Pullup and slew rate disabled when XTAL
pin function.
PTG2/EXTAL I/O N SWC SWC
Pullup and slew rate disabled when EXTAL
pin function.
PTG3 I/O N SWC SWC Not available on 32-pin, 42-, or 44-pin pkg
1
SWC is software controlled slew rate, the register is associated with the respective port.
2
SWC is software controlled pullup resistor, the register is associated with the respective port.
Table 2-2. Signal Properties (continued)
Pin
Name
Dir
High Current
Pin
Output
Slew
1
Pull-Up
2
Comments