Datasheet
Pins and Connections
MC9S08GT16A/GT8A Data Sheet, Rev. 1
Freescale Semiconductor 31
When an on-chip peripheral system is controlling a pin, data direction control bits still determine what is
read from port data registers even though the peripheral module controls the pin direction by controlling
the enable for the pin’s output buffer. See Chapter 6, “Parallel Input/Output,” for details.
Pullup enable bits for each input pin control whether on-chip pullup devices are enabled whenever the pin
is acting as an input even if it is being controlled by an on-chip peripheral module. When the PTA7–PTA4
pins are controlled by the KBI module and are configured for rising-edge/high-level sensitivity, the pullup
enable control bits enable pulldown devices rather than pullup devices. Similarly, when IRQ is configured
as the IRQ input and is set to detect rising edges, the pullup enable control bit enables a pulldown device
rather than a pullup device.
2.3.7 Signal Properties Summary
Table 2-2 summarizes I/O pin characteristics. These characteristics are determined by the way the
common pin interfaces are hardwired to internal circuits.
Table 2-2. Signal Properties
Pin
Name
Dir
High Current
Pin
Output
Slew
1
Pull-Up
2
Comments
V
DD
———
V
SS
———
The 48-pin QFN package has two V
SS
pins
— V
SS1
and V
SS2
.
V
DDAD
———
V
SSAD
———
V
REFH
———
V
REFL
———
RESET
I/O Y N Y Pin contains integrated pullup.
IRQ
I— — Y
IRQPE must be set to enable IRQ function.
IRQ does not have a clamp diode to V
DD
.
IRQ should not be driven above V
DD
.
Pullup/pulldown active when IRQ pin
function enabled. Pullup forced on when
IRQ enabled for falling edges; pulldown
forced on when IRQ enabled for rising
edges.
PTA0/KBIP0 I/O N SWC SWC
PTA1/KBIP1 I/O N SWC SWC
PTA2/KBIP2 I/O N SWC SWC
PTA3/KBIP3 I/O N SWC SWC
PTA4/KBIP4 I/O N SWC SWC Pullup/pulldown active when KBI pin
function enabled. Pullup forced on when
KBIPx enabled for falling edges; pulldown
forced on when KBIPx enabled for rising
edges.
PTA5/KBIP5 I/O N SWC SWC
PTA6/KBIP6 I/O N SWC SWC
PTA7/KBIP7 I/O N SWC SWC
PTB0/ADP0 I/O N SWC SWC
PTB1/ADP1 I/O N SWC SWC
PTB2/ADP2 I/O N SWC SWC