Datasheet

Internal Clock Generator (S08ICGV2)
MC9S08GB60A Data Sheet, Rev. 2
Freescale Semiconductor 119
Figure 7-8 shows flow charts for three conditions requiring ICG initialization.
Figure 7-8. ICG Initialization for FEE in Example #1
7.4.3 Example #2: External Crystal = 4 MHz, Bus Frequency = 20 MHz
In this example, the FLL will be used (in FEE mode) to multiply the external 4 MHz oscillator up to
40-MHz to achieve 20 MHz bus frequency.
After the MCU is released from reset, the ICG is in self-clocked mode (SCM) and supplies approximately
8 MHz on ICGOUT which corresponds to a 4 MHz bus frequency (f
Bus
).
During reset initialization software, the clock scheme will be set to FLL engaged, external (FEE). So
f
ICGOUT
= f
ext
* P * N / R ; P = 1, f
ext
= 4.00 MHz Eqn. 7-3
Solving for N / R gives:
N / R = 40 MHz /(4 MHz * 1) = 10 ; We can choose N = 10 and R = 1 Eqn. 7-4
The values needed in each register to set up the desired operation are:
ICGC1 = $78 (%01111000)
Bit 7 HGO 0 Configures oscillator for low-power operation
Bit 6 RANGE 1 Configures oscillator for high-frequency range; FLL prescale factor is 1
Bit 5 REFS 1 Requests an oscillator
Bits 4:3 CLKS 11 FLL engaged, external reference clock mode
Bit 2 OSCSTEN 0 Disables the oscillator in stop modes
Bit 1 LOCD 0 Loss-of-clock detection enabled
Bit 0 0 Unimplemented or reserved, always reads zero
RECOVERY FROM
CONTINUE
RECOVERY FROM STOP3
CHECK
LOCK = 1?
NO
YES
FLL LOCK STATUS.
INITIALIZE ICG
ICG1 = $38
ICG2 = $00
RECOVERY FROM STOP3
OSCSTEN = 1
OSCSTEN = 0
CONTINUE
CHECK
LOCK = 1?
NO
YES
FLL LOCK STATUS.
CONTINUE
CHECK
LOCK = 1?
NO
YES
FLL LOCK STATUS.
NOTE: THIS WILL REQUIRE THE OSCILLATOR TO START AND
STABILIZE. ACTUAL TIME IS DEPENDENT ON CRYSTAL /RESONATOR
AND EXTERNAL CIRCUITRY.
QUICK RECOVERY FROM STOP MINIMUM CURRENT DRAW IN STOP
RESET, STIO1, STOP2