Datasheet

Appendix A Electrical Characteristics
MC9S08GB60A Data Sheet, Rev. 2
262 Freescale Semiconductor
A.3 Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package
thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in
on-chip logic and voltage regulator circuits and it is user-determined rather than being controlled by the
MCU design. In order to take P
I/O
into account in power calculations, determine the difference between
actual pin voltage and V
SS
or V
DD
and multiply by the pin current for each I/O pin. Except in cases of
unusually high pin current (heavy loads), the difference between pin voltage and V
SS
or V
DD
will be very
small.
The average chip-junction temperature (T
J
) in °C can be obtained from:
T
J
= T
A
+ (P
D
× θ
JA
) Eqn. A-1
where:
T
A
= Ambient temperature, °C
θ
JA
= Package thermal resistance, junction-to-ambient, °C/W
P
D
= P
int
+ P
I/O
P
int
= I
DD
× V
DD
, Watts — chip internal power
P
I/O
= Power dissipation on input and output pins — user determined
For most applications, P
I/O
<< P
int
and can be neglected. An approximate relationship between P
D
and T
J
(if P
I/O
is neglected) is:
P
D
= K ÷ (T
J
+ 273°C) Eqn. A-2
Solving equations 1 and 2 for K gives:
K = P
D
× (T
A
+ 273°C) + θ
JA
× (P
D
)
2
Eqn. A-3
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring
P
D
(at equilibrium) for a known T
A
. Using this value of K, the values of P
D
and T
J
can be obtained by
solving equations 1 and 2 iteratively for any value of T
A
.
Table A-2. Thermal Characteristics
Rating Symbol Value Unit
Temp.
Code
Operating temperature range (packaged)
T
A
–40 to 85 °CC
Thermal resistance
64-pin LQFP (GBxxA)
48-pin QFN (GTxxA)
44-pin QFP (GTxxA)
42-pin SDIP (GTxxA)
θ
JA
1,2
1
Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance,
mounting site (board) temperature, ambient temperature, airflow, power dissipation of other components
on the board, and board thermal resistance.
2
Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board horizontal. Single layer board is
designed per JEDEC JESD51-3.
65
82
118
57
°C/W —