Datasheet

Appendix A Electrical Characteristics
MC9S08GB60A Data Sheet, Rev. 2
Freescale Semiconductor 275
Figure A-10. Internal Oscillator Deviation from Trimmed Frequency
A.9 AC Characteristics
This section describes ac timing characteristics for each peripheral system. For detailed information about
how clocks for the bus are generated, see Chapter 7, “Internal Clock Generator (S08ICGV2).”
1
Self-clocked mode frequency is the frequency that the DCO generates when the FLL is open-loop.
2
Loss of reference frequency is the reference frequency detected internally, which transitions the ICG into self-clocked
mode if it is not in the desired range.
3
Loss of DCO frequency is the DCO frequency detected internally, which transitions the ICG into FLL bypassed external
mode (if an external reference exists) if it is not in the desired range.
4
This parameter is characterized before qualification rather than 100% tested.
5
Proper PC board layout procedures must be followed to achieve specifications.
6
This specification applies to the period of time required for the FLL to lock after entering FLL engaged internal or external
modes. If a crystal/resonator is being used as the reference, this specification assumes it is already running.
7
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
ICGOUT
.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via V
DDA
and V
SSA
and variation in crystal oscillator frequency increase the C
Jitter
percentage for a given interval.
8
See Figure A-10
–60 –40 –20 0 20 20 60
80 100 120
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
0.1
PERCENT (%)
TEMPERATURE (°C)
2 V
3 V