Datasheet

Internal Clock Generator (S08ICGV4)
MC9S08GT16A/GT8A Data Sheet, Rev. 1
126 Freescale Semiconductor
Figure 9-2. Block Diagram Highlighting ICG Module
PTD3/TPM2CLK/TPM2CH0
PTD4/TPM2CH1
PTC1/RxD2
PTC0/TxD2
V
SS
V
DD
PTA7/KBIP7–
PTD2/TPM1CH2
PTD1/TPM1CH1
PTD0/TPM1CLK/TPM1CH0
PTC7
PTC6
PTC5
PTC4
PTC3/SCL
PTC2/SDA
PORT A
PORT C
PORT D
8-BIT KEYBOARD
INTERRUPT (KBI)
INTER-IC (IIC)
SERIAL PERIPHERAL
INTERFACE (SPI)
USER FLASH
USER RAM
(GT16A = 2048 BYTES)
DEBUG
MODULE (DBG)
(GT16A = 16,384 BYTES)
HCS08 CORE
NOTES:
1. Port pins are software configurable with pullup device if input port.
2. Pin contains pullup/pulldown device if IRQ enabled (IRQPE = 1).
3. IRQ does not have a clamp diode to VDD. IRQ should not be driven above VDD.
4. Pin contains integrated pullup device.
5. High current drive
6. Pins PTA[7:4] contain both pullup and pulldown devices. Pulldown available when KBI enabled (KBIPn = 1).
2-CHANNEL TIMER/PWM
(TPM2)
PTB7/ADP7–
PORT B
INTERFACE (SCI2)
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
VOLTAGE
REGULATOR
RTI
SERIAL COMMUNICATIONS
COP
IRQ LVD
LOW-POWER OSCILLATOR
INTERNAL CLOCK
GENERATOR (ICG)
RESET
V
SSAD
V
DDAD
V
REFH
V
REFL
ANALOG-TO-DIGITAL
CONVERTER (ATD)
INTERFACE (SCI1)
SERIAL COMMUNICATIONS
3-CHANNEL TIMER/PWM
(TPM1)
4
PTA3/KBIP3–
4
PTB4/ADP4
PTG3
PTG2/EXTAL
PTG0/BKGD/MS
PTG1/XTAL
PORT G
NOTE 4
NOTE 5
(GT8A = 8192 BYTES)
(GT8A = 1024 BYTES)
IRQ
NOTES 2, 3
10-BIT
NOTE 6
CPU BDC
V
SS
8
BKGD
XTAL
EXTAL
BKGD
PTE3/MISO
PTE2/SS
PTE0/TxD1
PTE1/RxD1
PORT E
PTE5/SPSCK
PTE4/MOSI
8
SPSCK
MOSI
MISO
SS
RXD1
TXD1
SCL
SDA
RXD2
TXD2
CH1
CH0
CH0
CH1
CH2
ON-CHIP ICE
4
PTA4/KBIP4
PTA0/KBIP0
PTB3/ADP3–
4
PTB0/ADP0
= Pins not available in 44-, 42-, or 32-pin packages
= Pins not available in 42- or 32-pin packages
= Pins not available in 32-pin packages