Datasheet

Inter-Integrated Circuit (S08IICV1)
MC9S08GT16A/GT8A Data Sheet, Rev. 1
Freescale Semiconductor 209
Refer to the direct-page register summary in the Memory chapter of this data sheet for the absolute address
assignments for all IIC registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
13.3.1 IIC Address Register (IICA)
13.3.2 IIC Frequency Divider Register (IICF)
76543210
R
ADDR
0
W
Reset 00000000
= Unimplemented or Reserved
Figure 13-3. IIC Address Register (IICA)
Table 13-1. IICA Register Field Descriptions
Field Description
7:1
ADDR[7:1]
IIC Address Register — The ADDR contains the specific slave address to be used by the IIC module. This is
the address the module will respond to when addressed as a slave.
76543210
R
MULT ICR
W
Reset 00000000
Figure 13-4. IIC Frequency Divider Register (IICF)