Datasheet
MC9S08JS16 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor22
Table 11. SPI Electrical Characteristic
Num
1
1
Refer to Figure 18 through Figure 21.
C Characteristic
2
2
All timing is shown with respect to 20% V
DD
and 80% V
DD
, unless noted; 50 pF load on all SPI pins. All timing assumes slew
rate control disabled and high drive strength enabled for SPI output pins.
Symbol Min Typical Max Unit
1D
Operating frequency
3
Master
Slave
3
The maximum frequency is 8 MHz when input filter on SPI pins is disabled.
f
op
f
op
f
Bus
/2048DC
—
—
f
Bus
/2
f
Bus
/4
Hz
2D
Cycle time
Master
Slave
t
SCK
t
SCK
2
4
—
—
2048
—
t
cyc
3D
Enable lead time
Master
Slave
t
Lead
t
Lead
—
—
1/2
1/2
—
—
t
SCK
4D
Enable lag time
Master
Slave
t
Lag
t
Lag
—
—
1/2
1/2
—
—
t
SCK
5D
Clock (SPSCK) high time
Master
Slave
t
SCKH
—
1/2 t
SCK
– 25
1/2 t
SCK
1/2 t
SCK
—
—
ns
6D
Clock (SPSCK) low time
Master
Slave
t
SCKL
—
1/2 t
SCK
– 25
1/2 t
SCK
1/2 t
SCK
—
—
ns
7D
Data setup time (inputs)
Master
Slave
t
SI(M)
t
SI(S)
30
30
—
—
—
—
ns
8D
Data hold time (inputs)
Master
Slave
t
HI(M)
t
HI(S)
30
30
—
—
—
—
ns
9 D Access time, slave
4
4
Time to data active from high-impedance state.
t
A
——40ns
10 D Disable time, slave
5
5
Hold time to high-impedance state.
t
dis
——40ns
11 D
Data setup time (outputs)
Master
Slave
t
SO
t
SO
—
—
—
—
25
25
ns
12 D
Data hold time (outputs)
Master
Slave
t
HO
t
HO
–10
–10
—
—
—
—
ns