Datasheet

MCU Block Diagram
MC9S08JS16 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 3
1 MCU Block Diagram
The block diagram, Figure 1, shows the structure of the MC9S08JS16 series MCU.
Figure 1. MC9S08JS16 Series Block Diagram
V
SS
V
DD
PORT B
8-BIT KEYBOARD
INTERRUPT MODULE (KBI)
USER FLASH (IN BYTES)
USER RAM (IN BYTES)
ON-CHIP ICE AND
DEBUG MODULE (DBG)
HCS08 CORE
CPU
NOTES:
1. Port pins are software configurable with pullup device if input port.
2. Pin contains software configurable pullup/pulldown device if IRQ is enabled (IRQPE = 1). Pulldown is enabled if
rising edge detect is selected (IRQEDG = 1).
3. IRQ does not have a clamp diode to V
DD
. IRQ must not be driven above V
DD
.
4. RESET
contains integrated pullup device if PTB1 enabled as reset pin function (RSTPE = 1).
5. Pin contains integrated pullup device.
6. When pin functions as KBI (KBIPEn = 1) and associated pin is configured to enable the pullup device, KBEDGn can
be used to reconfigure the pullup as a pulldown device.
PTA2/KBIP2/MOSI
PORT A
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
VOLTAGE
REGULATOR
COP IRQ LVD
LOW-POWER OSCILLATOR
MULTI-PURPOSE CLOCK
GENERATOR (MCG)
RESET
2-CHANNEL TIMER/PWM
MODULE (TPM)
PTA3/KBIP3/SPSCK
BKGD/MS
IRQ
KBIPx
TCLK
TPMCH0
TPMCH1
EXTAL
XTAL
USB
USB ENDPOINT
MODULE
RAM
FULL SPEED
USB
TRANSCEIVER
USBDP
USBDN
PTA6/KBIP6/RxD
PTA7/KBIP7/TxD
REAL-TIME COUNTER
(RTC)
PTA4/KBIP4/SS
PTA5/KBIP5/TPMCH1
8
SYSTEM
USB 3.3 V VOLTAGE REGULATOR
V
USB33
512
MC9S08JS16 = 16,384
V
SSOSC
PTA0/KBIP0/TPMCH0
PTA1/KBIP1/MISO
PTB3/BLMS
PTB2/BKGD/MS
PTB0/IRQ/TCLK
PTB1/RESET
PTB5/EXTAL
PTB4/XTAL
SERIAL PERIPHERAL
INTERFACE MODULE (SPI)
SPSCK
SS
MISO
MOSI
8-/16-BIT
8-BIT MODULO TIMER
MODULE (MTIM)
INTERFACE MODULE (SCI)
SERIAL COMMUNICATIONS
RxD
TxD
BDC
Bootloader ROM (IN BYTES)
4096
16-BIT Cyclic Redundancy
MODULE (CRC)
Check Generator
MC9S08JS8 = 8,192
MC9S08JS16L = 16,384
MC9S08JS8L = 8,192