Datasheet

Chapter 9 Liquid Crystal Display Driver (S08LCDV1)
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
132 Freescale Semiconductor
Read: anytime
Write: anytime
The LCDRAM registers provide access to two different register groups. Access to each register group is
controlled by the state of the LCDDRMS bit in the LCDCMD register. Each LCDRAM register location
provides the waveforms for up to two frontplane drivers.
R
FP23BP3 FP23BP2 FP23BP1 FP23BP0 FP22BP3 FP22BP2 FP22BP1 FP22BP0
W
Reset I I I I I I I I
R
FP25BP3 FP25BP2 FP25BP1 FP25BP0 FP24BP3 FP24BP2 FP24BP1 FP24BP0
W
Reset I I I I I I I I
R
FP27BP3 FP27BP2 FP27BP1 FP27BP0 FP26BP3 FP26BP2 FP26BP1 FP26BP0
W
Reset I I I I I I I I
R
FP29BP3 FP29BP2 FP29BP1 FP29BP0 FP28BP3 FP28BP2 FP28BP1 FP28BP0
W
Reset I I I I I I I I
R
FP31BP3 FP31BP2 FP31BP1 FP31BP0 FP30BP3 FP30BP2 FP30BP1 FP30BP0
W
Reset I I I I I I I I
R
FP33BP3 FP33BP2 FP33BP1 FP33BP0 FP32BP3 FP32BP2 FP32BP1 FP32BP0
W
Reset I I I I I I I I
R
FP35BP3 FP35BP2 FP35BP1 FP35BP0 FP34BP3 FP34BP2 FP34BP1 FP34BP0
W
Reset I I I I I I I I
R
FP37BP3 FP37BP2 FP37BP1 FP37BP0 FP36BP3 FP36BP2 FP36BP1 FP36BP0
W
Reset I I I I I I I I
R
FP39BP3 FP39BP2 FP39BP1 FP39BP0 FP38BP3 FP38BP2 FP38BP1 FP38BP0
W
Reset I I I I I I I I
R 0 0 0 0
FP40BP3 FP40BP2 FP40BP1 FP40BP0
W
Reset I I I I I I I I
I = Value is indeterminate
Figure 9-5. LCD Data Registers (LCDRAM) (continued)