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Chapter 9 Liquid Crystal Display Driver (S08LCDV1)

MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4

150 Freescale Semiconductor

9.4.3.1 LCD Segment Blinking

To conﬁgure all LCD segments to blink regardless of the contents of the LCDRAM bits while

LCDDRMS = 1, the BLKMODE bit in the LCDBCTL control register must to set to 1. To conﬁgure

individual LCD segments to blink, the BLKMODE bit in the LCDBCTL control register must be

deasserted.

If BLKMODE = 0, asserting the LCDRAM FP[n]BP[x] bits while LCDDRMS = 0 and LCDDRMS = 1

enables the LCD segment connected between FP[n] and BP[x] to blink when BLINK = 1. Each LCDRAM

9.4.3.2 Blink Frequency

The LCD module waveform base clock is the basis for the calculation of the LCD module blink frequency.

The LCD module blink frequency is equal to the LCD module waveform base clock divided by the

BRATE[2:0] divider. Table 9-17 shows LCD module blink frequency calculations for all values of

BRATE[2:0] and LCLK[2:0].

1 Shaded table entries are out of speciﬁcation and are not valid

9.4.4 LCD Charge Pump, Voltage Divider, and Power Supply Operation

This section describes the LCD charge pump, voltage divider, and LCD power supply conﬁguration

options. Figure 9-17 provides a block diagram for the LCD charge pump and a V

LCD

voltage divider.

The VSUPPLY[1:0] bit field in the LCDSUPPLY register is used to configure the LCD module power

supply source. VSUPPLY[1:0] indicates the state of internal signals used to configure power switches as

shown in the Table in Figure 9-17. The block diagram in Figure 9-17 illustrates several potential

operational modes for the LCD module including conﬁguration of the LCD module power supply source

using internal V

or an external supply.

Table 9-17. Blink Frequency Calculations

(Blink Rate = LCD Base (Hz) ÷ Blink Divider)

LCLK[2:0]

LCD Base

Frequency (Hz)

Blink Frequency

0 2049.3 64.0 32.0 16.0 8.00 4.00 2.00 1.00 0.50

1 1024.7 32.0 16.0 8.00 4.00 2.00 1.00 0.50 0.25

2 512.3 16.0 8.00 4.00 2.00 1.00 0.50 0.25 0.13

3 256.2 8.00 4.00 2.00 1.00 0.50 0.25 0.13 0.06

4 128.1 4.00 2.00 1.00 0.50 0.25 0.13 0.06 0.03

5 64.0 2.00 1.00 0.50 0.25 0.13 0.06 0.03 0.02

6 32.0 1.00 0.50 0.25 0.13 0.06 0.03 0.02 0.01

7 16.0 0.50 0.25 0.13 0.06 0.03 0.02 0.01 0.00

Blink Divider = 2

(5+ BRATE[2:0])

32 64 128 256 512 1024 2048 4096