Datasheet

Chapter 10 Internal Clock Generator (S08ICGV4)
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
176 Freescale Semiconductor
2
OSCSTEN
Enable Oscillator in Off Mode — The OSCSTEN bit controls whether or not the oscillator circuit remains
enabled when the ICG enters off mode. This bit has no effect if HGO = 1 and RANGE = 1.
0 Oscillator disabled when ICG is in off mode unless ENABLE is high, CLKS = 10, and REFST = 1.
1 Oscillator enabled when ICG is in off mode, CLKS = 1X and REFST = 1.
1
LOCD
Loss of Clock Disable
0 Loss of clock detection enabled.
1 Loss of clock detection disabled.
Table 10-1. ICGC1 Register Field Descriptions (continued)
Field Description