Datasheet

Appendix A Electrical Characteristics
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Freescale Semiconductor 325
K = P
D
× (T
A
+ 273°C) + θ
JA
× (P
D
)
2
Eqn. A-3
where K is a constant pertaining to the particular part. K can be determined from Equation A-3 by
measuring P
D
(at equilibrium) for a known T
A
. Using this value of K, the values of P
D
and T
J
can be
obtained by solving equations 1 and 2 iteratively for any value of T
A
.
A.4 Electrostatic Discharge (ESD) Protection Characteristics
Although damage from static discharge is much less common on these devices than on early CMOS
circuits, normal handling precautions should be used to avoid exposure to static discharge. Qualification
tests are performed to ensure that these devices can withstand exposure to reasonable levels of static
without suffering any permanent damage. All ESD testing is in conformity with CDF-AEC-Q00 Stress
Test Qualification for Automotive Grade Integrated Circuits. (http://www.aecouncil.com/) This device was
qualified to AEC-Q100 Rev E. A device is considered to have failed if, after exposure to ESD pulses, the
device no longer meets the device specification requirements. Complete dc parametric and functional
testing is performed per the applicable device specification at room temperature followed by hot
temperature, unless specified otherwise in the device specification.
Table A-3. ESD and Latch-up Test Conditions
Model Description Symbol Value Unit
Human
Body
Series resistance R1 1500
Ω
Storage capacitance C 100 pF
Number of pulses per pin — 3
Machine
Series resistance R1 0
Ω
Storage capacitance C 200 pF
Number of pulses per pin — 3
Latch-up Minimum input voltage limit 1.8 V
Maximum input voltage limit 3.6 V
Table A-4. ESD and Latch-Up Protection Characteristics
No.
Rating
(1)
1
Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Symbol Min Max Unit
1 Human body model (HBM)
V
HBM
± 2000 — V
2 Machine model (MM)
V
MM
± 200 — V
3 Charge device model (CDM)
V
CDM
± 500 — V
4
Latch-up current at T
A
=85°CI
LAT
± 100 — mA