Datasheet
Chapter 5 Resets, Interrupts, and System Configuration
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
76 Freescale Semiconductor
5.8.7 System Real-Time Interrupt Status and Control Register (SRTISC)
This register contains one read-only status flag, one write-only acknowledge bit, three read/write delay
selects, and one unimplemented bit, which always reads 0.
76543210
R
RTIF
0
RTICLKS RTIE
0
RTIS2
RTIS
1 RTIS0
W RTIACK
Reset 00000000
= Unimplemented or Reserved
Figure 5-9. System RTI Status and Control Register (SRTISC)
Table 5-10. SRTISC Field Descriptions
Field Description
7
RTIF
Real-Time Interrupt Flag — This read-only status bit indicates the periodic wakeup timer has timed out.
0 Periodic wakeup timer not timed out.
1 Periodic wakeup timer timed out.
6
RTIACK
Real-Time Interrupt Acknowledge — This write-only bit is used to acknowledge real-time interrupt request
(write 1 to clear RTIF). Writing 0 has no meaning or effect. Reads always return 0.
5
RTICLKS
Real-Time Interrupt Clock Select — This read/write bit selects the clock source for the real-time interrupt.
0 Real-time interrupt request clock source is internal 1-kHz oscillator.
1 Real-time interrupt request clock source is external clock.
4
RTIE
Real-Time Interrupt Enable — This read/write bit enables real-time interrupts.
0 Real-time interrupts disabled.
1 Real-time interrupts enabled.
2:0
RTIS[2:0]
Real-Time Interrupt Period Selects — These read/write bits select the wakeup period for the RTI. See
Table 5-11.
Table 5-11. Real-Time Interrupt Period
RTIS2:RTIS1:RTIS0
Internal 1 kHz Clock Source
1
(t
RTI
= 1 ms, Nominal)
1
See Table A-13 t
RTI
in Appendix A, “Electrical Characteristics,” for the tolerance on these values.
External Clock Source
2
Period = t
ext
2
t
ext
is based on the external clock source, resonator, or crystal selected by the ICG configuration. See Table A-12 for details.
0:0:0 Disable RTI Disable RTI
0:0:1 8 ms t
ext
x 256
0:1:0 32 ms t
ext
x 1024
0:1:1 64 ms t
ext
x 2048
1:0:0 128 ms t
ext
x 4096
1:0:1 256 ms t
ext
x 8192
1:1:0 512 ms t
ext
x 16384
1:1:1 1.024 s t
ext
x 32768
