Datasheet

MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor24
Figure 16. Typical Crystal or Resonator Circuit: Low Range/Low Power
2.9 Internal Clock Source (ICS) Characteristics
Table 11. ICS Frequency Specifications (Temperature Range = –40 C to 105 C Ambient)
Num C Characteristic Symbol Min Typ
1
1
Data in Typical column was characterized at 5.0 V, 25 C or is typical recommended value.
Max Unit
1 P Average internal reference frequency — factory trimmed
at VDD = 5.0 V and temperature = 25
C
f
int_ft
32.768 kHz
2 C Average internal reference frequency — user trimmed f
int_t
31.25 39.0625 kHz
3 C Internal reference start-up time t
IRST
—60100s
4 P DCO output frequency range —
trimmed
2
2
The resulting bus clock frequency should not exceed the maximum specified bus clock frequency of the device.
Low range (DRS = 00) f
dco_t
16 20 MHz
P Mid range (DRS = 01) 32 40
5 P DCO output frequency
2
Reference = 32768 Hz
and
DMX32 = 1
Low range (DRS = 00) f
dco_DMX32
19.92 MHz
P Mid range (DRS = 01) 39.85
6 C Resolution of trimmed DCO output frequency at fixed
voltage and temperature (using FTRIM)
3
3
This parameter is characterized and not tested on each device.
f
dco_res_t
0.1 0.2 %f
dco
7 C Resolution of trimmed DCO output frequency at fixed
voltage and temperature (not using FTRIM)
3
f
dco_res_t
0.2 0.4 %f
dco
8 P Total deviation of trimmed DCO output frequency over
voltage and temperature
f
dco_t
—–1.0
to +0.5
2%f
dco
9 C Total deviation of trimmed DCO output frequency over
fixed voltage and temperature range of 0 C to 70 C
3
f
dco_t
0.5 1%f
dco
10 C FLL acquisition time
3, 4
4
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,
this specification assumes it is already running.
t
Acquire
——1mS
11 C Long term jitter of DCO output clock (averaged over 2 ms
interval)
5
5
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
Bus
.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via V
DD
and V
SS
and variation in the crystal oscillator frequency increase the C
Jitter
percentage
for a given interval.
C
Jitter
—0.020.2%f
dco
XOSC
EXTAL XTAL
Crystal or Resonator