Datasheet
Table 4-50. Erase EEPROM sector command error handling
Register Error bit Error condition
NVM_FSTAT
ACCERR
Set if CCOBIX[2:0] ≠ 001 at command launch
Set if command is not available in current mode (see Table 4-9)
Set if an invalid global address [23:0] is supplied (see Table 4-6)
FPVIOL Set if the selected area of the EEPROM memory is protected
MGSTAT1 Set if any errors have been encountered during the verify operation
MGSTAT0
Set if any non-correctable errors have been encountered during the verify
operation
4.6 Flash and EEPROM registers descriptions
The flash module contains a set of 16 user control and status registers located between
0x3020 and 0x302F. In the case of the writable registers, the write accesses are forbidden
during flash command execution. For more details, see Caution note in Flash and
EEPROM memory map. A summary of the flash module registers is given in the
following table with detailed descriptions in the following subsections.
NVM memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
3020 Flash Clock Divider Register (NVM_FCLKDIV) 8 R/W 00h 4.6.1/105
3021 Flash Security Register (NVM_FSEC) 8 R Undefined 4.6.2/106
3022 Flash CCOB Index Register (NVM_FCCOBIX) 8 R/W 00h 4.6.3/107
3024 Flash Configuration Register (NVM_FCNFG) 8 R/W 00h 4.6.4/108
3025 Flash Error Configuration Register (NVM_FERCNFG) 8 R/W 00h 4.6.5/109
3026 Flash Status Register (NVM_FSTAT) 8 R/W 80h 4.6.6/109
3027 Flash Error Status Register (NVM_FERSTAT) 8 R/W 00h 4.6.7/110
3028 Flash Protection Register (NVM_FPROT) 8 R Undefined 4.6.8/111
3029 EEPROM Protection Register (NVM_EEPROT) 8 R/W Undefined 4.6.9/113
302A
Flash Common Command Object Register:High
(NVM_FCCOBHI)
8 R/W 00h 4.6.10/114
302B
Flash Common Command Object Register: Low
(NVM_FCCOBLO)
8 R/W 00h 4.6.11/114
302C Flash Option Register (NVM_FOPT) 8 R Undefined 4.6.12/114
4.6.1 Flash Clock Divider Register (NVM_FCLKDIV)
The FCLKDIV register is used to control timed events in program and erase algorithms.
Chapter 4 Memory map
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 105