Datasheet
Section number Title Page
9.10.1.4 Temperature sensor........................................................................................................................243
9.10.2 Analog comparator (ACMP)............................................................................................................................244
9.10.2.1 ACMP configuration information..................................................................................................246
9.10.2.2 ACMP in stop3 mode.....................................................................................................................247
9.10.2.3 ACMP to FTM configuration information.....................................................................................247
9.10.2.4 ACMP for SCI0 RXD filter...........................................................................................................247
9.11 Human-machine interfaces HMI.....................................................................................................................................248
9.11.1 Keyboard interrupts (KBI)...............................................................................................................................248
Chapter 10
Central processor unit
10.1 Introduction.....................................................................................................................................................................251
10.1.1 Features............................................................................................................................................................251
10.2 Programmer's Model and CPU Registers.......................................................................................................................252
10.2.1 Accumulator (A)..............................................................................................................................................252
10.2.2 Index Register (H:X)........................................................................................................................................253
10.2.3 Stack Pointer (SP)............................................................................................................................................253
10.2.4 Program Counter (PC).....................................................................................................................................254
10.2.5 Condition Code Register (CCR)......................................................................................................................254
10.3 Addressing Modes..........................................................................................................................................................255
10.3.1 Inherent Addressing Mode (INH)....................................................................................................................256
10.3.2 Relative Addressing Mode (REL)....................................................................................................................256
10.3.3 Immediate Addressing Mode (IMM)...............................................................................................................256
10.3.4 Direct Addressing Mode (DIR)........................................................................................................................257
10.3.5 Extended Addressing Mode (EXT)..................................................................................................................257
10.3.6 Indexed Addressing Mode...............................................................................................................................258
10.3.6.1 Indexed, No Offset (IX).................................................................................................................258
10.3.6.2 Indexed, No Offset with Post Increment (IX+)..............................................................................258
10.3.6.3 Indexed, 8-Bit Offset (IX1)............................................................................................................258
10.3.6.4 Indexed, 8-Bit Offset with Post Increment (IX1+)........................................................................259
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
12 Freescale Semiconductor, Inc.