Datasheet

5.2.1 Features
Features of the IRQ module include:
• A Dedicated External Interrupt Pin
• IRQ Interrupt Control Bits
• Programmable Edge-only or Edge and Level Interrupt Sensitivity
• Automatic Interrupt Acknowledge
• Internal pullup device
A low level applied to the external interrupt request (IRQ) pin can latch a CPU interrupt
request. The following figure shows the structure of the IRQ module:
IRQIE
D
Q
CK
CLR
IRQ
INTERRUPT
REQUEST
V
DD
IRQMOD
IRQF
TO CPU FOR
INSTRUCTIONS
RESET
BYPASS
STOP
STOP
BUSCLK
IRQPE
IRQ
1
0
S
IRQEDG
SYNCHRO-
SYNCHRO-
NIZER
NIZER
IRQPDD
WAKE-UP
INPUTS
MODULES
TO INTERNAL
IRQACK
BIL/BIH
To pullup enable logic for IRQ
Figure 5-3. IRQ module block diagram
External interrupts are managed by the IRQSC status and control register. When the IRQ
function is enabled, synchronous logic monitors the pin for edge-only or edge-and-level
events. When the MCU is in stop mode and system clocks are shut down, a separate
asynchronous path is used so that the IRQ, if enabled, can wake the MCU.
IRQ
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
124 Freescale Semiconductor, Inc.