Datasheet
5.3.1 Interrupt Pin Request Status and Control Register (IRQ_SC)
This direct page register includes status and control bits, which are used to configure the
IRQ function, report status, and acknowledge IRQ events.
Address: 3Bh base + 0h offset = 3Bh
Bit 7 6 5 4 3 2 1 0
Read 0
IRQPDD IRQEDG IRQPE
IRQF 0
IRQIE IRQMOD
Write IRQACK
Reset
0 0 0 0 0 0 0 0
IRQ_SC field descriptions
Field Description
7
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
6
IRQPDD
Interrupt Request (IRQ) Pull Device Disable
This read/write control bit is used to disable the internal pullup device when the IRQ pin is enabled (IRQPE
= 1) allowing for an external device to be used.
0 IRQ pull device enabled if IRQPE = 1.
1 IRQ pull device disabled if IRQPE = 1.
5
IRQEDG
Interrupt Request (IRQ) Edge Select
This read/write control bit is used to select the polarity of edges or levels on the IRQ pin that cause IRQF
to be set. The IRQMOD control bit determines whether the IRQ pin is sensitive to both edges and levels or
only edges. When the IRQ pin is enabled as the IRQ input and is configured to detect rising edges, the
optional pullup resistor is disabled.
0 IRQ is falling edge or falling edge/low-level sensitive.
1 IRQ is rising edge or rising edge/high-level sensitive.
4
IRQPE
IRQ Pin Enable
This read/write control bit enables the IRQ pin function. When this bit is set the IRQ pin can be used as an
interrupt request.
0 IRQ pin function is disabled.
1 IRQ pin function is enabled.
3
IRQF
IRQ Flag
This read-only status bit indicates when an interrupt request event has occurred.
0 No IRQ request.
1 IRQ event detected.
2
IRQACK
IRQ Acknowledge
This write-only bit is used to acknowledge interrupt request events (write 1 to clear IRQF). Writing 0 has
no meaning or effect. Reads always return 0. If edge-and-level detection is selected (IRQMOD = 1), IRQF
cannot be cleared while the IRQ pin remains at its asserted level.
Table continues on the next page...
Interrupt pin request register
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
126 Freescale Semiconductor, Inc.