Datasheet

7.7.21 Port D Input Enable Register (PORT_PTDIE)
Address: 0h base + 30BBh offset = 30BBh
Bit 7 6 5 4 3 2 1 0
Read
PTDIE7 PTDIE6 PTDIE5 PTDIE4 PTDIE3 PTDIE2 PTDIE1 PTDIE0
Write
Reset
0 0 0 0 0 0 0 0
PORT_PTDIE field descriptions
Field Description
7
PTDIE7
Input Enable for Port D Bit 7
This read/write bit enables the port D pin as an input.
0 Input disabled for port D bit 7.
1 Input enabled for port D bit 7.
6
PTDIE6
Input Enable for Port D Bit 6
This read/write bit enables the port D pin as an input.
0 Input disabled for port D bit 6.
1 Input enabled for port D bit 6.
5
PTDIE5
Input Enable for Port D Bit 5
This read/write bit enables the port D pin as an input.
0 Input disabled for port D bit 5.
1 Input enabled for port D bit 5.
4
PTDIE4
Input Enable for Port D Bit 4
This read/write bit enables the port D pin as an input.
0 Input disabled for port D bit 4.
1 Input enabled for port D bit 4.
3
PTDIE3
Input Enable for Port D Bit 3
This read/write bit enables the port D pin as an input.
0 Input disabled for port D bit 3.
1 Input enabled for port D bit 3.
2
PTDIE2
Input Enable for Port D Bit 2
This read/write bit enables the port D pin as an input.
0 Input disabled for port D bit 2.
1 Input enabled for port D bit 2.
1
PTDIE1
Input Enable for Port D Bit 1
This read/write bit enables the port D pin as an input.
Table continues on the next page...
Chapter 7 Parallel input/output
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 175