Datasheet

PORT_PTEIE field descriptions (continued)
Field Description
0 Input disabled for port E bit 3.
1 Input enabled for port E bit 3.
2
PTEIE2
Input Enable for Port E Bit 2
This read/write bit enables the port E pin as an input.
0 Input disabled for port E bit 2.
1 Input enabled for port E bit 2.
1
PTEIE1
Input Enable for Port E Bit 1
This read/write bit enables the port E pin as an input.
0 Input disabled for port E bit 1.
1 Input enabled for port E bit 1.
0
PTEIE0
Input Enable for Port E Bit 0
This read/write bit enables the port E pin as an input.
0 Input disabled for port E bit 0.
1 Input enabled for port E bit 0.
7.7.23 Port F Input Enable Register (PORT_PTFIE)
Address: 0h base + 30BDh offset = 30BDh
Bit 7 6 5 4 3 2 1 0
Read
PTFIE7 PTFIE6 PTFIE5 PTFIE4 PTFIE3 PTFIE2 PTFIE1 PTFIE0
Write
Reset
0 0 0 0 0 0 0 0
PORT_PTFIE field descriptions
Field Description
7
PTFIE7
Input Enable for Port F Bit 7
This read/write bit enables the port F pin as an input.
0 Input disabled for port F bit 7.
1 Input enabled for port F bit 7.
6
PTFIE6
Input Enable for Port F Bit 6
This read/write bit enables the port F pin as an input.
0 Input disabled for port F bit 6.
1 Input enabled for port F bit 6.
5
PTFIE5
Input Enable for Port F Bit 5
This read/write bit enables the port F pin as an input.
Table continues on the next page...
Chapter 7 Parallel input/output
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 177