Datasheet

PORT_IOFLT1 field descriptions (continued)
Field Description
1–0
FLTE
Filter selection for input from PTE
00 BUSCLK
01 FLTDIV1
10 FLTDIV2
11 FLTDIV3
7.7.28 Port Filter Register 2 (PORT_IOFLT2)
This register sets the filters for input from RESET AND IRQ.
Address: 0h base + 30EEh offset = 30EEh
Bit 7 6 5 4 3 2 1 0
Read 0
FLTKBI1 FLTKBI0 FLTRST
Write
Reset
0 0 0 0 0 0 0 0
PORT_IOFLT2 field descriptions
Field Description
7–6
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
5–4
FLTKBI1
Filter selection for input from KBI1
00 BUSCLK
01 Select FLTDIV1, and will switch to FLTDIV3 in stop mode automatically.
10 Select FLTDIV2, and will switch to FLTDIV3 in stop mode automatically.
11 FLTDIV3
3–2
FLTKBI0
Filter selection for input from KBI0
00 BUSCLK
01 Select FLTDIV1, and will switch to FLTDIV3 in stop mode automatically.
10 Select FLTDIV2, and will switch to FLTDIV3 in stop mode automatically.
11 FLTDIV3
1–0
FLTRST
Filter selection for input from RESET/IRQ
00 No filter.
01 Select FLTDIV1, and will switch to FLTDIV3 in stop mode automatically.
10 Select FLTDIV2, and will switch to FLTDIV3 in stop mode automatically.
11 FLTDIV3
Port data registers
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
182 Freescale Semiconductor, Inc.