Datasheet

PORT_PTFPE field descriptions (continued)
Field Description
This control bit determines if the internal pullup device is enabled for the associated PTF pin. For port F
pins that are configured as outputs or Hi-Z, these bits have no effect.
0 Pullup disabled for port F bit 0.
1 Pullup enabled for port F bit 0.
7.7.36 Port G Pullup Enable Register (PORT_PTGPE)
Address: 0h base + 30F6h offset = 30F6h
Bit 7 6 5 4 3 2 1 0
Read 0
PTGPE3 PTGPE2 PTGPE1 PTGPE0
Write
Reset
0 0 0 0 0 0 0 0
PORT_PTGPE field descriptions
Field Description
7–4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
3
PTGPE3
Pull Enable for Port G Bit 3
This control bit determines if the internal pullup device is enabled for the associated PTG pin. For port G
pins that are configured as outputs or Hi-Z, these bits have no effect.
0 Pullup disabled for port G bit 3.
1 Pullup enabled for port G bit 3.
2
PTGPE2
Pull Enable for Port G Bit 2
This control bit determines if the internal pullup device is enabled for the associated PTG pin. For port G
pins that are configured as outputs or Hi-Z, these bits have no effect.
0 Pullup disabled for port G bit 2.
1 Pullup enabled for port G bit 2.
1
PTGPE1
Pull Enable for Port G Bit 1
This control bit determines if the internal pullup device is enabled for the associated PTG pin. For port G
pins that are configured as outputs or Hi-Z, these bits have no effect.
0 Pullup disabled for port G bit 1.
1 Pullup enabled for port G bit 1.
0
PTGPE0
Pull Enable for Port G Bit 0
This control bit determines if the internal pullup device is enabled for the associated PTG pin. For port G
pins that are configured as outputs or Hi-Z, these bits have no effect.
0 Pullup disabled for port G bit 0.
1 Pullup enabled for port G bit 0.
Port data registers
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
192 Freescale Semiconductor, Inc.